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| Ordering number : EN*5786 CMOS LSI LC895126 CD-ROM Decoder with Built-in SCSI Interface Preliminary Overview The LC895126 is a CD-ROM decoder that in addition to CD-ROM functions also provides a built-in SCSI interface. * Supports 20MB/s transfers (This capability is currently under evaluation (July 1997) and cannot be guaranteed at present.) Package Dimensions unit: mm 3214-SQFP144 [LC895126] Functions * CD-ROM ECC functions, subcode read function, SCSI interface, CAV audio functions Features * Built-in SCSI interface (Includes a SCAM selection register) * Supports 24x playback and a 10MB/sec data transfer rate (when 16-bit data path 70-ns EDO DRAM is used). * Supports the use of up to 4 Mbit of buffer RAM. * Users can freely set up the CD main channel, C2 flag, and other areas in buffer RAM. * Batch transfer function (Function that transfers the CD main channel, C2 flag, and other data in a single operation) * Multiblock transfer function (Function that transfers multiple blocks automatically in a single operation) * Subcode ECC functions and CD-Text support * CAV audio functions * Intelligent functions (Including auto buffering, auto decoding, and CD-R support) SANYO: SQFP144 Specifications Absolute Maximum Ratings at Ta = 25C, VSS = 0 V Parameter Maximum supply voltage Input and output voltage Allowable power dissipation Operating temperature Storage temperature Soldering conditions (pins only) Symbol VDD max VI, VO Pd max Topr Tstg 10 seconds Ta 70C Conditions Ratings -0.3 to +7.0 -0.3 to VDD +0.3 550 -30 to +70 -55 to +125 260 Unit V V mW C C C Allowable Operating Ranges at Ta = -30 to +70C, VSS = 0 V Parameter Supply voltage Input voltage range Symbol VDD VIN Conditions Ratings min 4.5 0 typ 5.0 max 5.5 VDD Unit V V SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-0005 JAPAN 13098HA (OT) No. 5786-1/7 LC895126 Electrical Characteristics at Ta = -30 to +70C, VSS = 0 V, VDD = 4.5 to 5.5 V Parameter Input high-level voltage Input low-level voltage Input high-level voltage Input low-level voltage Input high-level voltage Input low-level voltage Input high-level voltage Input low-level voltage Input high-level voltage Input low-level voltage Output high-level voltage Output low-level voltage Output high-level voltage Output low-level voltage Output high-level voltage Output low-level voltage Output low-level voltage Input leakage current Pull-up resistance Symbol VIH1 VIL1 VIH2 VIL2 VIH3 VIL3 VIH4 VIL4 VIH5 VIL5 VOH1 VOL1 VOH2 VOL2 VOH2 VOL2 VOL4 IIL RUP Conditions Ratings min 2.2 0.8 2.2 0.8 2.2 0.8 0.8 VDD 0.2 VDD 2.0 0.8 VDD - 2.1 0.4 2.4 0.4 2.4 0.4 0.4 -25 60 120 +25 240 typ max Unit V V V V V V V V V V V V V V V V V A k TTL level pins: (1) TTL level pins: (9) Pins with built-in pull-up resistors. TTL level pins: (2) Schmitt input pins CMOS level pins: (3) Schmitt input pins (4), (8), (10) IOH1 = -12 mA : (6) IOL1 = 12 mA : (6) IOH2 = -8 mA : (7) IOL2 = 8 mA : (7) IOH2 = -2 mA : (9), (5) IOL2 = 2 mA : (9), (5) IOL4 = 48 mA : (10) VI = VSS or VDD: All input pins. (5), (9) The pin sets referred to above are as follows: INPUT (1) TEST0 to TEST4, CSCTRL, SUA0 to SUA6, X1EN, WFCK, SBS0 (2) C2PO, SDATA, BCK, LRCK, SCOR, ZRESET (3) ZCS, ZRD, ZWR (4) SCSISEL, XTALSEL OUTPUT (5) ZINT0, ZINT1, ZSWAIT (6) MCK, MCK2, MCK3 (7) EXCK, DSDATA, DLRCK, DBCK, ZRAS0, ZRAS1, ZCAS0, ZCAS1, ZOE, ZUWE, ZLWE, RA0 to RA8 INOUT (8) ACK, ATN (9) D0 to D7, IO0 to IO15, IOP0 to IOP4 (10) DB0 to DB7, DBP, BSY, I/O, MSG, SEL, RST, REQ, C/D Note: The XTAL0, XTALCK0, XTAL1, and XTALCK1 pins are not covered by the electrical characteristics. SCSI Interface Pin Input Characteristics Parameter Symbol Vt + t1 Vt - t1 Vtt1 VDD = 5.0 V Conditions VDD = 4.50 to 5.50 V 0.80 0.41 Ratings min typ 1.60 1.10 0.5 max 2.00 Unit V V V Input threshold voltage Hysteresis Active Negation Output Characteristics Parameter Output high-level voltage Output low-level voltage Symbol VOH VOL IOH = -24 mA IOL = 48 mA Conditions Ratings min 2.5 0.4 typ max Unit V V Note: Active negation refers to the DB0 to DB7, REQ, and DBPB outputs. Figure 1 No. 5786-2/7 LC895126 Pin Functions I: Input pin, O: Output pin, B: Bidirectional pin, P: Power Supply pin, NC: Not Connection pin Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 C2PO SDATA BCK LRCK EXCK WFCK VDD VSS0 SBSO SCOR DSDATA DLRCK DBCK MCK VSS0 XTALCK0 XTAL0 TEST0 TEST1 TEST2 TEST3 TEST4 MCK2 MCK3 VSS0 VDD ZRESET ZRD ZWR VSS0 VSS0 VSS0 Symbol VSS0 IO2 IO1 IO0 MCK2SEL Type P B B B I NC P P P NC NC I I I I O I P P I I O O O O P I O I I I I I O O P P I I I Chip reset. The system is reset by a low-level input. Microcontroller data read signal input Microcontroller data write signal input Outputs the XTALCK0 state (1/1, 1/2, 1/512, or stopped) Test pins. These pins must be connected to VSS0. Crystal oscillator circuit input Crystal oscillator circuit input Outputs the XTALCK1 state (1/1, 1/2, or stopped) D/A converter outputs Subcode I/O Subcode I/O CD DSP interface Buffer RAM data I/O pins. Built in pull-up resistors. Provided for switching between MCK2 (22 MHz, 20 MHz) and MCK3 (27 MHz, 25 MHz) in PLL mode. Currently, must be connected to VDD. Function Continued on next page. No. 5786-3/7 LC895126 Continued from preceding page. Pin No. 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 VDD VSS1 MSG RST VSS1 ACK BSY VSS1 Symbol ZCS CSCTRL SUA0 SUA1 SUA2 SUA3 SUA4 SUA5 SUA6 D0 D1 D2 D3 VDD VSS0 D4 D5 D6 D7 ZINT0 ZINT1 ZSWAIT VSS0 IOP0 IOP1 IOP2 IOP3 IOP4 X1EN ZTALCK1 XTAL1 VSS0 VDD VSS1 I/O REQ VSS1 C/D SEL Type I I I I I I I I I B B B B P P B B B B O O O P B B B B B I I O P P P B B P B B NC P P B B P B B P SCSI interface connections SCSI interface connections SCSI interface connections SCSI interface connections Must be tied low in versions without a PLL circuit. Must be connected to VDD through a resistor in versions that use the PLL circuit. Shock proof function oscillator circuit input. Used by the PLL circuit in PLL versions. Shock proof function oscillator circuit output. Used by the PLL circuit in PLL versions. Analog system ground in PLL versions Analog system power supply in PLL versions General-purpose I/O Interrupt request signal output to the microcontroller (ECC side. Set up by register settings.) Interrupt request signal output to the microcontroller (SCSI side. Set up by register settings.) Wait signal output to the microcontroller Microcontroller data signals Microcontroller register selection signals Register chip select signal input from the microcontroller CS active low/active high selection input from the microcontroller Function Continued on next page. No. 5786-4/7 LC895126 Continued from preceding page. Pin No. 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 DBP VDD DB7 DB6 VSS1 DB5 DB4 VDD DB3 DB2 VSS1 DB1 DB0 SCSISEL XTALSEL VSS1 VDD VSS0 ZRAS0 ZRAS1 ZCAS0 ZCAS1 ZOE ZUWE ZLWE VSS0 RA0 RA1 RA2 RA3 RA4 RA5 RA6 VDD VSS0 RA7 RA8 RA9 (IO15) RA10 (IO14) Symbol ATN VDD VSS1 Type B P P NC B P B B P B B P B B P B B I I P P P O O O O O O O P O O O O O O O P P O O B B Buffer RAM address outputs Buffer RAM address and data outputs. Built in pull-up resistors. Buffer RAM address outputs RAS output 0 for buffer RAM (Normally, RAS 0 is used.) RAS output 1 for buffer RAM CAS output 0 for buffer RAM (Normally, CAS 0 is used.) CAS output 1 for buffer RAM Buffer RAM output enable Buffer RAM upper write enable Buffer RAM lower write enable SCSI interface connections SCSI pin assignment selection (No change when held low.) XATL oscillator selection in PLL mode SCSI interface connections SCSI interface connections SCSI interface connections SCSI interface connections SCSI interface connections Function Continued on next page. No. 5786-5/7 LC895126 Continued from preceding page. Pin No. 132 133 134 135 136 137 138 139 140 141 142 143 144 Symbol IO13 IO12 IO11 IO10 IO9 IO8 VSS0 IO7 IO6 IO5 IO4 IO3 VDD Type B B B B B B P B B B B B P Buffer RAM data I/O. Built in pull-up resistors. Buffer RAM data I/O. Built in pull-up resistors. Function NC pins must be left open. Pin names that start with a `Z' are negative logic (i.e. active low) pins. VSS0 is the logic system ground, and VSS1 is the SCSI interface system ground. If DRAM is used, undershoot prevention measures, such as inserting resistors in the RAS and CAS lines and inserting capacitors to ground, must be taken. Since this IC includes buffers that sink 48 mA, applications must take adequate noise reduction measures. No. 5786-6/7 LC895126 Block Diagram *1 WFCK, SBSO, SCOR *2 BCK, SDATA, LRCK, C2PO *3 DB0 to DB7, DBP, BSY, MSG, SEL, RST, REQ, I/O, C/D *4 ACK, ATN *5 ZRD, ZWR, SUA0 to AUA6, ZCS, CSCTRL *6 D0 to D7 *7 IO0 to IO15 *8 RA0 to RA10, ZRAS0, ZRAS1, ZCAS0, ZCAS1, ZOE, ZUWE, ZLWE *9 DBCK, DLRCK, DSDATA Note: The pins IO15 and RA9 share pin 130, and the pins IO14 and RA10 share pin 131. s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of January, 1998. Specifications and information herein are subject to change without notice. PS No. 5786-7/7 |
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